; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=loop-versioning -S < %s | FileCheck %s

; NB: addrspaces 10-13 are non-integral
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12:13"

%jl_value_t = type opaque
%jl_array_t = type { ptr addrspace(13), i64, i16, i16, i32 }

define void @test(ptr %arg) {
; CHECK-LABEL: @test(
; CHECK-NEXT:  L74.lver.check:
; CHECK-NEXT:    [[I:%.*]] = alloca [3 x i64], align 8
; CHECK-NEXT:    [[I1:%.*]] = load ptr addrspace(10), ptr [[ARG:%.*]], align 8
; CHECK-NEXT:    [[I2:%.*]] = getelementptr inbounds ptr addrspace(10), ptr [[ARG]], i64 1
; CHECK-NEXT:    [[I3:%.*]] = load ptr addrspace(10), ptr [[I2]], align 8
; CHECK-NEXT:    store i64 1, ptr [[I]], align 8
; CHECK-NEXT:    [[I5:%.*]] = getelementptr inbounds [3 x i64], ptr [[I]], i64 0, i64 1
; CHECK-NEXT:    [[I6:%.*]] = load i64, ptr inttoptr (i64 24 to ptr), align 8
; CHECK-NEXT:    [[I7:%.*]] = addrspacecast ptr addrspace(10) [[I3]] to ptr addrspace(11)
; CHECK-NEXT:    [[I9:%.*]] = load ptr addrspace(13), ptr addrspace(11) [[I7]], align 8
; CHECK-NEXT:    [[I10:%.*]] = addrspacecast ptr addrspace(10) [[I1]] to ptr addrspace(11)
; CHECK-NEXT:    [[I12:%.*]] = load ptr addrspace(13), ptr addrspace(11) [[I10]], align 8
; CHECK-NEXT:    [[I13:%.*]] = load i64, ptr [[I5]], align 8
; CHECK-NEXT:    [[TMP0:%.*]] = shl i64 [[I6]], 3
; CHECK-NEXT:    [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(13) [[I12]], i64 [[TMP0]]
; CHECK-NEXT:    [[SCEVGEP1:%.*]] = getelementptr i8, ptr addrspace(13) [[I9]], i64 [[TMP0]]
; CHECK-NEXT:    [[BOUND0:%.*]] = icmp ult ptr addrspace(13) [[I12]], [[SCEVGEP1]]
; CHECK-NEXT:    [[BOUND1:%.*]] = icmp ult ptr addrspace(13) [[I9]], [[SCEVGEP]]
; CHECK-NEXT:    [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
; CHECK-NEXT:    [[IDENT_CHECK:%.*]] = icmp ne i64 [[I13]], 1
; CHECK-NEXT:    [[LVER_SAFE:%.*]] = or i1 [[FOUND_CONFLICT]], [[IDENT_CHECK]]
; CHECK-NEXT:    br i1 [[LVER_SAFE]], label [[L74_PH_LVER_ORIG:%.*]], label [[L74_PH:%.*]]
; CHECK:       L74.ph.lver.orig:
; CHECK-NEXT:    br label [[L74_LVER_ORIG:%.*]]
; CHECK:       L74.lver.orig:
; CHECK-NEXT:    [[VALUE_PHI20_LVER_ORIG:%.*]] = phi i64 [ 1, [[L74_PH_LVER_ORIG]] ], [ [[I21_LVER_ORIG:%.*]], [[L74_LVER_ORIG]] ]
; CHECK-NEXT:    [[VALUE_PHI21_LVER_ORIG:%.*]] = phi i64 [ 1, [[L74_PH_LVER_ORIG]] ], [ [[I22_LVER_ORIG:%.*]], [[L74_LVER_ORIG]] ]
; CHECK-NEXT:    [[VALUE_PHI22_LVER_ORIG:%.*]] = phi i64 [ 1, [[L74_PH_LVER_ORIG]] ], [ [[I24_LVER_ORIG:%.*]], [[L74_LVER_ORIG]] ]
; CHECK-NEXT:    [[I14_LVER_ORIG:%.*]] = add i64 [[VALUE_PHI21_LVER_ORIG]], -1
; CHECK-NEXT:    [[I15_LVER_ORIG:%.*]] = getelementptr inbounds double, ptr addrspace(13) [[I9]], i64 [[I14_LVER_ORIG]]
; CHECK-NEXT:    [[I17_LVER_ORIG:%.*]] = load i64, ptr addrspace(13) [[I15_LVER_ORIG]], align 8
; CHECK-NEXT:    [[I18_LVER_ORIG:%.*]] = add i64 [[VALUE_PHI20_LVER_ORIG]], -1
; CHECK-NEXT:    [[I19_LVER_ORIG:%.*]] = getelementptr inbounds double, ptr addrspace(13) [[I12]], i64 [[I18_LVER_ORIG]]
; CHECK-NEXT:    store i64 [[I17_LVER_ORIG]], ptr addrspace(13) [[I19_LVER_ORIG]], align 8
; CHECK-NEXT:    [[I21_LVER_ORIG]] = add i64 [[VALUE_PHI20_LVER_ORIG]], 1
; CHECK-NEXT:    [[I22_LVER_ORIG]] = add i64 [[I13]], [[VALUE_PHI21_LVER_ORIG]]
; CHECK-NEXT:    [[I23_LVER_ORIG:%.*]] = icmp eq i64 [[VALUE_PHI22_LVER_ORIG]], [[I6]]
; CHECK-NEXT:    [[I24_LVER_ORIG]] = add i64 [[VALUE_PHI22_LVER_ORIG]], 1
; CHECK-NEXT:    br i1 [[I23_LVER_ORIG]], label [[L94_LOOPEXIT:%.*]], label [[L74_LVER_ORIG]]
; CHECK:       L74.ph:
; CHECK-NEXT:    br label [[L74:%.*]]
; CHECK:       L74:
; CHECK-NEXT:    [[VALUE_PHI20:%.*]] = phi i64 [ 1, [[L74_PH]] ], [ [[I21:%.*]], [[L74]] ]
; CHECK-NEXT:    [[VALUE_PHI21:%.*]] = phi i64 [ 1, [[L74_PH]] ], [ [[I22:%.*]], [[L74]] ]
; CHECK-NEXT:    [[VALUE_PHI22:%.*]] = phi i64 [ 1, [[L74_PH]] ], [ [[I24:%.*]], [[L74]] ]
; CHECK-NEXT:    [[I14:%.*]] = add i64 [[VALUE_PHI21]], -1
; CHECK-NEXT:    [[I15:%.*]] = getelementptr inbounds double, ptr addrspace(13) [[I9]], i64 [[I14]]
; CHECK-NEXT:    [[I17:%.*]] = load i64, ptr addrspace(13) [[I15]], align 8, !alias.scope !0
; CHECK-NEXT:    [[I18:%.*]] = add i64 [[VALUE_PHI20]], -1
; CHECK-NEXT:    [[I19:%.*]] = getelementptr inbounds double, ptr addrspace(13) [[I12]], i64 [[I18]]
; CHECK-NEXT:    store i64 [[I17]], ptr addrspace(13) [[I19]], align 8, !alias.scope !3, !noalias !0
; CHECK-NEXT:    [[I21]] = add i64 [[VALUE_PHI20]], 1
; CHECK-NEXT:    [[I22]] = add i64 [[I13]], [[VALUE_PHI21]]
; CHECK-NEXT:    [[I23:%.*]] = icmp eq i64 [[VALUE_PHI22]], [[I6]]
; CHECK-NEXT:    [[I24]] = add i64 [[VALUE_PHI22]], 1
; CHECK-NEXT:    br i1 [[I23]], label [[L94_LOOPEXIT2:%.*]], label [[L74]]
; CHECK:       L94.loopexit:
; CHECK-NEXT:    br label [[L94:%.*]]
; CHECK:       L94.loopexit2:
; CHECK-NEXT:    br label [[L94]]
; CHECK:       L94:
; CHECK-NEXT:    ret void
;
top:
  %i = alloca [3 x i64], align 8
  %i1 = load ptr addrspace(10), ptr %arg, align 8
  %i2 = getelementptr inbounds ptr addrspace(10), ptr %arg, i64 1
  %i3 = load ptr addrspace(10), ptr %i2, align 8
  store i64 1, ptr %i, align 8
  %i5 = getelementptr inbounds [3 x i64], ptr %i, i64 0, i64 1
  %i6 = load i64, ptr inttoptr (i64 24 to ptr), align 8
  %i7 = addrspacecast ptr addrspace(10) %i3 to ptr addrspace(11)
  %i9 = load ptr addrspace(13), ptr addrspace(11) %i7, align 8
  %i10 = addrspacecast ptr addrspace(10) %i1 to ptr addrspace(11)
  %i12 = load ptr addrspace(13), ptr addrspace(11) %i10, align 8
  %i13 = load i64, ptr %i5, align 8
  br label %L74

L74:                                              ; preds = %L74, %top
  %value_phi20 = phi i64 [ 1, %top ], [ %i21, %L74 ]
  %value_phi21 = phi i64 [ 1, %top ], [ %i22, %L74 ]
  %value_phi22 = phi i64 [ 1, %top ], [ %i24, %L74 ]
  %i14 = add i64 %value_phi21, -1
  %i15 = getelementptr inbounds double, ptr addrspace(13) %i9, i64 %i14
  %i17 = load i64, ptr addrspace(13) %i15, align 8
  %i18 = add i64 %value_phi20, -1
  %i19 = getelementptr inbounds double, ptr addrspace(13) %i12, i64 %i18
  store i64 %i17, ptr addrspace(13) %i19, align 8
  %i21 = add i64 %value_phi20, 1
  %i22 = add i64 %i13, %value_phi21
  %i23 = icmp eq i64 %value_phi22, %i6
  %i24 = add i64 %value_phi22, 1
  br i1 %i23, label %L94, label %L74

L94:                                              ; preds = %L74
  ret void
}
